EE512 - CMOS Analog IC Design

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CMOS Analog IC Design



Course number: EE512

Course name: CMOS Analog IC design

Credit: 3-0-0-3 (L-T-P-C)

Prerequisite: Network theory (EE203), signals and system (IC260), control theory (EE301) and the instructor's consent.

Intended for: BTech (EE) III and IV year/MS/PhD

Elective or Core: Elective

Semester: Even/Odd

Preamble: This course builds the basic concepts and the design of advanced CMOS analog IC design. The course is inteneded to teach undergraduate and graduate students. This course focuses on the concepts of MOSFETs and design of amplifiers including non-linear effects. The course will give practical aspect of CMOS analog IC design. As a part of this course, the students will use industry standard softwares and tools such as Cadence's Virtuoso schematic, Spectre simulator and MentorGraphics' Eldo and Calibre for post layout simulations along with the parasitic extractions. The design problems given in the form of assignments will be designed and simulated in a standard 0.13 um CMOS technology by students. The study will cover design issues on the PVT variations and statistical mismatches in temperature and process (MonteCarlo). In summary, the course is designed with considering the need of VLSI design industry.


Course outline: The course aims to teach basic concepts along with advanced design techniques for CMOS amplifier designs.The objective of the course is to design and to implement the product level opamps and buffers for VLSI applications.


Course modules:
MOS short channel effects and device models:

  • MOSFET basics, small-signal model derivation for a single transistor amplifier

  • Process, voltage, temperature (PVT) dependency and analog layout design essential considerations

Single stage amplifiers:

  • Basic concept, Common source stage: with resistive load, with diode connected load, with current-source load, with triode load, with source degeneration

  • Source follower (common-drain) and common gate with various loads

CMOS Differential amplifiers:

  • Single ended differential operation, basic differential pair (qualitative and quantitative analysis), common mode response, differential pair with MOS loads and Gilbert cell multiplier

  • Concept of matching transistors for analog layout, analog layout techniques for differential amplifier

CMOS Current mirrors:

  • Scheme and implementation: basic current mirrors, cascode current mirrors and active current mirrors with large and small signal analysis

  • Understanding of common-mode properties

  • Analog layout making techniques for current mirrors

CMOS amplifier Frequency response:

  • Miller effect, common source (CS), Common gate (CG), Common drain (CD) stages and cascode stage

  • Analog layout techniques for MIM, MOM and fringe capacitor

Noise analysis of the CMOS amplifier circuits:

  • Types of noise, significance of flicker and thermal.

  • Analysis and representation of noise in single stage amplifiers: CG, CS, source follower and cascode stage and noise in differential pairs.

Feedback

  • Feedback topologies (voltage-voltage, current-voltage, voltage-current, current-voltage) and the noise and the loading effect analysis.

Design of the CMOS operational amplifiers:

  • Opamp simulations scheme

  • One-stage opamps and two stage opamps,

  • Gain boosting techniques, folded cascode, telescopic amplifier and common mode feedback (CMFB) amplifier

  • Three stage opamp architectures

  • Opamp specifications analysis,

  • Design of high speed and high gain amplifiers

Stability and frequency compensation

  • Specification analysis, multi-pole system, three stage opamp, phase margin,

  • Frequency compensation, pole-zero doublet analysis

Analog layout techniques

  • Design rule check (DRC), layout versus schematic (LVS) and antenna effects

  • Design of pad-ring and gds file generation

Text book:

  1. "Design of Analog CMOS Integrated Circuits” by Behzad Razavi.


Reference books:

  1. "CMOS Analog Circuit Design” by Phillip Allen and Douglas R. Holberg.

  2. "Operation and Modeling of the MOS Transistor” by Yannis Tsividis.